High Power CPUs Supply Applications – An Innovative Approach to Tuning for Load Transients
In dc-dc voltage converters, one of the most challenging rails is the CPU rail. The CPU has current transients with very high current steps and high slew rates. The CPU rail also requires output capacitors that can sum up to several mF (typically around 4mF), which increases the size and cost of the solution.
In dc-dc voltage converters, one of the most challenging rails is the CPU rail. The CPU has current transients with very high current steps and high slew rates. The CPU rail also requires output capacitors that can sum up to several mF (typically around 4mF), which increases the size and cost of the solution.
Controller vendors have come up with improvements to reduce the number of output capacitors and so save money in the solution’s overall BOM. These improvements often consist of having non-linear loops in parallel to the main control loop.
The non-linear loops turn on all the phases at the same time, asynchronously, when they detect a transient. Depending on the vendor, some sense the remote Vout to trigger this event, some the output of the Error Amplifier. The necessity of a non-linear loop is also based on the fact that, for EMI concerns, the design community prefers Voltage Mode to Constant-On Time control.
Figure 1 illustrates how the non-linear loop works. When a current transient takes place, Vout drops and all the phases are on for one pulse asynchronously. Load Transient Boost (LTB) is STMicroelectronics’ name for the non-linear loop.
Figure 1. Non-linear loops: this is STMicroelectronics’ “LTB” (Load Transient Boost).
This idea of a Voltage Mode control with a non-linear parallel loop works well and serves to save a few output capacitors.
When the CPU applies a heavy output current transient to the system, the presence of the non-linear loop generates a better Vout regulation, with a smaller drop. In other words, it is possible to state that, keeping the same drop, non-linear loops allow one to use a much smaller output capacitor filter.
However, non-linear loops come at a price – they are difficult to tune. This is due to the fact that state-of-the-art CPUs have several power states; in full activity, the CPU has high current steps and slew rates, and in lower activity states, the current transient step and slew rates are medium and low. The non-linear loop is tunable on one particular step of current and a particular slew rate. If the device is tuned to trigger the non-linear loop at low to medium current steps, it will trigger too often, resulting in an instable converter. This is not acceptable, so usually designers trigger for high current steps. What happens is that it becomes difficult to stay within electrical specifications at low power states unless some of the output capacitors are put back, defeating the purpose this technology is trying to achieve.
So, in order to simplify the difficulty of fine-tuning, yet still offer an architecture able to save output capacitors and respect electrical specifications, we describe here a new approach, called Voltage controlled Constant-On Time (VCOT) architecture.
We have developed a new control mode, a Constant-On Time, with the ability to switch at a constant frequency in all steady states of load. The frequency can increase or decrease only during an output current transient. In particular, the frequency will increase when the output current is increasing, and will decrease when the output current is decreasing. This addresses the problem of traditional Constant-On Time: poor regulation accuracy. In fact, VCOT architecture has the same regulation accuracy of a Voltage Mode. It is not noise sensitive because VCOT doesn’t have the hysteretic behavior of Constant-On Time. Furthermore, VCOT architecture has the peculiarity of behaving as a pure Constant-On Time below a programmable load, and so, of benefiting from natural Pulse Skip Algorithm for light load efficiency increase.
A VCOT Control Loop merges the advantages of a Voltage Mode control and a Constant-On Time control loop.
In Figure 2, we show an example of how the system would react to a current transient.
Figure 2. VCOT architecture is based on Fsw acceleration and deceleration proportional to the error signal of the error amplifier. This brings simplification and unconditional capacitor savings.
The acceleration or deceleration of the frequency is linear compared to the output current change, or, in other words, is linear to the error signal of the error amplifier.
This is extremely important because it means the reaction to transients will take place for any given step and slew rate of the transient with a reaction proportional to the size of current change.
This means application designers do not have to compromise on which step to react to, and brings simplification and unconditional capacitor savings to the design process.
In conclusion, as summarized in Figure 3, traditional Voltage Mode converters for CPU power supplies are easy to use and fine-tune, but they require a lot of output capacitors.
To save cost and space, silicon vendors have developed voltage mode controllers with non-linear parallel loops. Although these kinds of devices are able to provide some savings, they are also difficult to fine-tune.
Figure 3. A graphic of Complexity vs Capacitor Savings.
For this reason, STMicroelectronics has designed a new architecture called VCOT, based on a Voltage controlled Constant-On Time. This architecture, when compared to Voltage Mode with non-linear loop, saves output capacitors with a remarkably decreased level of complexity for fine-tuning.
