Vidatronic Inc. announced the ACCUREF™ Series of voltage and current reference IP cores in the TSMC 130nm process. The IP cores are optimized for low-power Application Specific Standard Circuit (ASSP), and PMIC integration.
Vidatronic’s ACCUREF™ Series of IP cores offers a number of compelling benefits to chip and system designers. The IP core’s unique design improves upon current products by allowing the systems to operate with ultra-low levels of power consumption without sacrificing accuracy or noise performance.
In addition to their superior performance, the ACCUREF™ IP cores do not require any external components in order to operate and offer designers the option of integration of the temperature sensor and current reference with the voltage reference into a single IP block, thus providing easy integration into the system and remarkable area savings overall. Due to their multiple benefits, Vidatronic’s solutions are applicable in a broad range of applications spanning from mobile to enterprise to Internet of Things (IoT).
“In the past, customers have typically been forced to make some tradeoffs between power consumption, size, and other performance characteristics when selecting voltage and current references,” says Stephen Nolan, Vice President of Sales and Business Development at Vidatronic.
“What makes the ACCUREF™ product line unique, however, is that our engineers at Vidatronic have implemented revolutionary new techniques to circumvent those previously existing barriers and can now offer a truly impressive level of accuracy and noise rejection, while maintaining ultra-low power levels. These products integrate with our current IP portfolio to further solidify our company as a leader in power management for the connected world,” Nolan asserted.
The ACCUREF™ Series of IP cores are designed to generate a precise/adjustable reference voltage. The reference voltage can be adjusted (for example) from 0.75V to 1.25V per customer request, with single digit millivolt accuracy over a wide temperature range.
The reference system is architected to achieve a power supply rejection ratio (PSRR) of over 90dB and extremely low values of integrated noise on the reference voltage without any external components, like filter capacitors.
“As is the case with all of our designs, we can also easily customize the IP cores to match individual customer needs, including porting to different processes,” Nolan added. “Our talented team of engineers here at Vidatronic has a vast array of experience in a number of different CMOS planar as well as FinFet process nodes and works quickly to meet just about any client need in a very short amount of time.
“We know how important time to market is for our customers and we’re here to support them with any of their power management needs,” concluded Nolan.
The ACCUREF™ series is immediately available.