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Digitally-Controlled Three-Channel Interleaved PFC Reference Design

October 12, 2017 by Paul Shepard

STMicroelectronics offers a three-channel digitally-controlled interleaved power factor correction reference design that provides complete information for application developers on how to configure the STNRGPF01 digital controller.

Target applications include welding power supplies, industrial motors, UPSs, battery chargers, ac-dc power supplies, air conditioners, and so on.

STNRGPF01 devices are a part of the STNRG family of STMicroelectronics digital devices designed for advanced power conversion applications. In this case the STNRGPF01 has integrated a complete application for interleaved power factor corrections and it's able to drive up to three interleaved channels.

The STNRGPF01 device contains all the control functions for designing a high efficiency interleaved PFC with sinusoidal line current consumption. It works in the CCM at fixed frequency with average current mode control and it implements mixed signal (analog/digital) control offering the advantages of very high-end digital solution without typical limits of analog ones.

The STNRGPF01 device performs cascaded control for voltage and current loops in order to regulate the output voltage by acting on the total average inductor current.

The figure below shows the STNRGPF01 control scheme.

(click on image to enlarge)

The device implements mixed signal (analog/digital) control as follows:

  • The difference between the output voltage feedback Vout_fb and reference Vout_ref is sent to a digital PI which calculates the peak of the total input average current ipk_ref (digital section, green line).
  • The PFC current reference is internally generated and comes out from the I/O FFD block as the PWM signal. After filtering it becomes the total average sinusoidal input current reference (itot_ref) for the inner current loop (analog section, red line).
  • The difference between itot_ref and the input current feedback itot_fb is sent to the external analog PI. So the master PWM signal is generated by comparing the analog PI output Vctrl and a triangular wave Vtriang at switching frequency.
  • Finally the interleaving operation is performed and three PWM signals 120° phase shifted (180° for two channels only) are generated. Moreover the I/O FFD block performs an input voltage and load feedforwards in order to improve the PFC transient response.

The STNRGPF01 can be configured by a dedicated software tool (eDesignSuite) in order to be customized for a specific application.

So the user has to open the software tool, enters the converter specifications and runs the configurator. The results will be: the schematic, BOM, and binary code.

(click on image to enlarge)

The binary code can be downloaded into the STNRGPF01 through the available programming interface having a customized device that can be used like an analog device ready to use in the application.

Key features of the STNRGPF01 include:

  • Interleaved boost PFC
  • Up to 3 interleaved channels
  • CCM, fixed frequency
  • Average current control, cycle-by-cycle
  • Inrush current control
  • Burst mode support
  • Overcurrent and thermal protection
  • Soft start-up
  • Flexible phase-shedding strategy
    • High operating frequency with small PFC inductor, suitable for high power-density applications
    • Low ripple current (input/output)
    • Simpler integration with other applications
  • Flexible design customization to meet specific customer needs
  • Firmware
    • Turnkey solution for quick design
    • eDesign Suite graphical user interface (GUI) for application configuration
  • Embedded memory data retention 15 years with ECC
  • Communication interfaces
    • UART asynchronous protocol for bootloader support
  • Operating temperature: -40 °C to 105 °C