The TIDA-01604 reference design from Texas Instruments functions from a base of silicon carbide (SiC) MOSFETs that are driven by a C2000 microcontroller (MCU) with SiC-isolated gate drivers. The design implements three-phase interleaving and operates in continuous conduction mode (CCM) to achieve an efficiency of 98.46% at a 240-V input voltage and 6.6-kW full power.
The C2000 controller enables phase shedding and adaptive dead-time control to improve the power factor at light load. The gate driver board (see TIDA-01605) is capable of delivering a 4-A source and 6-A sink peak current. The gate driver board implements a reinforced isolation and can withstand more than 100-V/ns common-mode transient immunity (CMTI).
The gate driver board also contains the two-level turnoff circuit, which protects the MOSFETs from voltage overshoot during the short-circuit scenario.
This reference design is an example of a continuing trend to move toward a bridgeless architecture with the elimination of the traditional diode bridge. The use of silicon power devices and has limitations such as low efficiency, low power density, and high weight. With the advantages of the SiC MOSFET, the designer can greatly improve these limitations by utilizing the superior performance of fast switching, low reverse recovery charge, and a low RDS(ON).
The totem-pole PFC operates in the positive and negative cycles of the ac mains input, respectively, and determines the current flow depending on how the high frequency SiC MOSFETs are switched (see Figure 2 and Figure 3, respectively).
The high-frequency SiC MOSFETs together with the inductor create a synchronous mode boost converter. During the positive half cycle, S2 is the boost switch which is driven with duty cycle D and S1 is driven with a complementary pulse-width modulation (PWM) signal (1-D).
Figure 2 (A) shows the direction in which the current flows. Similarly, during the period when S2 is switched with 1-D, S1 is switched with D; Figure 2 (B) shows the direction in which the current flows. Note that, during this cycle, SD2 conducts continuously.
During the negative half cycle, the operation is similar except that the role of the high-side- and low-side, high-frequency switches are swapped. Figure 3 shows the direction in which the current flows. Note that, during this cycle, SD1 conducts continuously.
This reference design uses an SiC MOSFET (C3M0065100K from Wolfspeed) and TI’s C2000™ Piccolo™ (TMS320F280049) high-performance MCU. The high-frequency SiC MOSFETs operate at a 100-kHz switching frequency and the pair of Si MOSFETs operate at the line frequency (approximately 45Hz to 60Hz).
Thus the conduction path includes one SiC switch and one low-frequency Si switch with significantly-reduced conduction losses.
Use three-channel interleaving to reduce conduction loss and input current ripple. Test results demonstrate a high efficiency above 98.5% and confirm that the advanced features of the controller function, such as phase shedding and adaptive dead-time control.
- High-power-density, high-efficiency PFC design to power systems up to 6.6 kW
- Half-bridge- and compact isolated gate driver with reinforced isolation and two-level turnoff protection
- Full digital control with high-performance C2000™ controller to enable advanced control scheme
- 46% peak efficiency, greater than 0.99 power factor and less than 2% total harmonic distortion (THD)
- Three-phase interleaved operation with phase shedding control