How Pareto Analysis Helps Determine the Real Benefits of GaN for Power Supplies
By Dr. Matthias Kasper & Dr. Gerald Deboy, Infineon Technologies Austria AG
Introduction – Thanks to the continued research and inventiveness of the engineering community, power supply technology has managed to eke out efficiency improvements through a combination of improved silicon (Si) power switches and improved system topologies. Some of the impetus driving this development is the continued insatiable growth in hyper scale datacenters and telecoms applications.
The need for always-on, high-bandwidth wireless data access has set the groundwork for the implementation of 5G networks. This will see addition power demands across the existing mobile network infrastructure as the necessary equipment is installed and brought online. This is placing continued pressure on power supply manufacturers to focus on the efficiency of their solutions. In the telecoms space, equipment is mostly powered at the industry-standard of -48V, while power supplies typically have an output range of 40V to 60V.
The cloud is also proving to be a space not only of expandable and seemingly endless storage, but also the basis of a range of X-as-a-Service solutions. This allows businesses, from start-up through to established, to bring software solutions to market quickly without having to invest in any hardware at all. Data centers are looking to minimize their running costs, of which electricity plays a not insignificant part. Efficient power supplies not only reduce their own energy consumption but also minimize the amount of waste heat that needs to be dissipated, an addition cost factor. As power demands have started to reach around 20kW, the industry has been moving away from the conventional 12V to 48V solutions, similar to the telecoms industry. Despite the advances already achieved, they continue to look for further improvements that will improve their total cost of ownership (TCO).
Gallium nitride (GaN) high-electron-mobility transistors (HEMTs) have been gaining in interest and ubiquity thanks to a unique range of capabilities that let them stand out against their Si counterparts. Thanks to their order of magnitude lower gate and output charge, as well as virtually zero reverse recovery charge, they make hard commutation of reverse conducting devices possible. This allows the use of simpler topologies such as totem pole PFC stages with continuous current modulation.
GaN devices allow the use of higher switching frequencies with reduced switching losses making higher power densities and higher efficiencies possible, especially when compared to Si-based solutions. On the downside, the initial capital expenditure (CapEx) of the solution cost tends to rise due to the higher costs of GaN switches compared to traditional Si alternatives.
Can improved efficiency be justified in the TCO?
It becomes challenging to compare power supplies based upon GaN and Si because the efficiency improvements on offer look, at first glance, to be quite small. With silicon-based designs achieving a highly respectable 97.6% efficiency, a nearest GaN equivalent that attains 98.1% only seems to be 0.5% improved. However, that seemingly small enhancement in efficiency is actually a reduction of losses of one-fifth (falling from 2.4% to 1.9%). To further complicate matters, the two supplies will be using different topologies and, therefore, a different selection of components. How can the GaN solution, with its slightly higher outlay, be fairly compared with the highest efficiency Si alternative?
With such a high number of variable parameters to consider, along with a range of performance factors to scrutinize, the use of a Pareto optimization approach can help to determine the real benefits of such disparate but similar electronic solutions. This avoids the use of ‘gut-feel’ and forms a more scientific basis for a side-by-side comparison. In order to undertake this analysis, both Si and GaN power supply designs were compared using this approach, focusing on their efficiency, power density, and TCO.
A Pareto optimization approach used a typical telecoms power supply with a nominal input voltage of 230VRMS that provided an output voltage of 43V to 58V (with a nominal value of 54V), as shown in Figure 1. A maximum output power of 3kW was also defined, along with a hold-up time of 10ms at this power. It should be noted that, even though a telecom power supply was chosen for this example, the results can also be applied to datacom power supplies that provide a 48V output voltage. The analysis focused solely on the power supply itself and not any other system-level elements, such as ORing, which incur some small additional losses that will need to be taken into consideration separately.
The power supply design investigated considered typical usage conditions by simulating the system at 50% load for a 54Vout and 230Vin. Using totem-pole power factor correction (PFC) and an inductor-inductor-capacitor (LLC) topology, the Si-based design used triangular current mode (TCM) to implement soft switching. In comparison, the GaN-based design made use of continuous conduction mode (CCM) with fixed switching frequency for modulation of the PFC.
As well as the electronic components, many other factors impacting the TCO were also considered. These ranged from control losses and the cooling system, to the space taken up by the components with an estimated 20% volume of air, and the cost of the casing, connectors, PCB, and manufacturing. Lifetime of the final solution was set at seven years, power usage effectiveness (PUE) of the data center was defined at 1.5, and electricity costs of $0.10US/kWh were used. All of these cost factors are taken from the perspective of the data center operator and also consider a 25% gross margin for the power supply vendor.
Performing a multi-objective Pareto analysis
A multi-objective Pareto analysis was used to perform multiple simulations on the defined power supply designs to deliver results for efficiency, volume and cost for each design. This was undertaken for a variety of component-level and system-level options, including:
- Numbers of totem-pole HF legs, EMI stages, parallel converter stages, and matrix transformers in LLC
- Switching frequency of ac-dc stage (50kHz to 150kHz) and resonant frequency of dc-dc stage (50kHz to 350kHz)
- Values of passive components
- Inductor, transformer and capacitor design
By working through all possible design variants, a range of results were attained that, when combined with the financial assumptions, could be used to calculate values of TCO. To ensure that the results were credible the analysis also considered aspects including thermal and magnetic behavior of components, and the losses, volume and cost of inductors.
The outcome of the simulation delivers a ‘Pareto surface’, also referred to as a ‘Pareto frontier’, that describes a series of optimal design choices that are plotted graphically. Each point describes a solution that, should a single design factor be changed, would result in a deterioration of either efficiency, volume or cost.
Determining whether GaN really delivers
With the simulations for the 54Vout, 230Vin design operating at 50% load completed, the efficiency and power density results were plotted against each other (figure 2). With the red points indicating the results for the GaN solution and blue points the Si solution, it is clear that the GaN design outperforms the Si design to varying degrees, but not all. The next step focuses only on the optimal designs along the GaN and Si results curves, comparing the best Si designs with the best GaN designs.
This leads to the plotting of only the ‘Pareto-optimal solutions’ for power density and efficiency. With GaN being plotted again in red and Si in blue, it is clear that, for any chosen power density, a GaN-based design can always be implemented that is more efficient (figure 3).
The efficiency improvement ranges from around 0.4% at the lowest power densities (20W/inch3) to around 0.8% at power densities of 90W/inch3. The results also show that densities of 10W/inch3 higher can be achieved with GaN compared to the most power dense Si designs, while both technologies suffer from lower achievable maximum efficiencies as power density increases. This initial analysis helps to provide an initial trade-off framework within which designers can operate when considering the GaN vs Si options.
From here the focus can move to the TCO aspect by selecting a specific dimension, such as power density, and considering just the financial implications of GaN vs Si. In the case reviewed here 80W/inch3 was chosen, but the results are similar for other high power densities too. The graph is plotted using the silicon design with the lowest solution cost (but not necessarily TCO) on the y-axis at 100%. Each potential Si and GaN design is then plotted for TCO and efficiency with the same colors as before. Here we can see that the most efficient GaN design, achieving 97.35% efficiency, manages to deliver a 13% TCO improvement over its closest Si equivalent (figure 4).
From these results, and despite having a higher initial cost, the GaN-based design is significantly more efficient and will dissipate less heat during operation. This benefits data center operators thanks to lower electricity costs and a reduction in demand on their cooling systems.
Power supply design advances, thanks to research into topologies and optimizations in silicon switch technology, have resulted in designs that are already highly efficient. On paper, GaN technology definitely shows potential for improvements in power density and efficiency but, without deeper analysis, it can be challenging to precisely quantify how these might translate into what kind of financial advantage.
The Pareto analysis approach discussed here provides a basis for comparison of power supply designs utilizing switches of differing technology that stand up to scientific scrutiny. This is essential for data center operators trying to understand the true advantages that GaN-based designs will deliver them beyond the inevitable shift toward higher power densities. In addition, Pareto-optimization provides power supply system designers with an approach that can justify topology choice and component selection beyond CapEx by also factoring TCO in early on in the design process.
To learn more about how Infineon’s GaN portfolio and solutions can help your power design, please visit http://www.infineon.com/gan.