Components

High-Temperature Gate Driver Board for SiC MOSFET Power Modules

Cissoid introduced a gate driver board optimized for 62mm SiC MOSFET power modules rated at 125°C (Ta). This board, based on the company’s HADES gate driver chipset, offers thermal headroom for the design of high-density power converters in industrial and automotive applications. The gate driver board features a low inductance gate loop design.

Applications for the gate driver board include EVs, fab automation, power inverters, dc-dc converters, onboard battery chargers. The gate driver can also be used for power conversion of uninterruptible power supplies and wind turbines.

It enables high frequency of above 100KHz and fast SiC MOSFET’s switching (dV/dt>50KV/µs), improving efficiency and reducing the size and weight of power converters.

Cissoid designed the board for harsh voltage environments supporting the drive of 1700V power modules with isolation voltages up to 3600V (50Hz, 1min) and creepage distances of 14mm.

CMT-TIT8244 features low parasitic capacitance between primary and high-side of 10pF.

High-level block diagram (Click on image to enlarge)

Protection functions such as under-voltage lockout (UVLO), Active Miller Clamping (AMC), and Desaturation detection ensure the safe drive and reliable protection of the power module in case of fault events. Other protection functions include open drain fault output, gate-source short circuit protection, a glitch suppressor on PWM inputs, and anti-overlap protection (on PWM inputs).

Features
  • Designed to drive 62mm 300A
  • SiC MOSFET Power Modules
  • Board size: 69mm x 116mm
  • Operating temperature: -40°C to 125°C
  • Bus voltage:1200V/1700V max
  • Isolation: 3600VAC @50Hz (1min)
  • 14mm creepage/12mm clearance
  • > 50kV/µs dV/dt immunity
  • Low parasitic capacitance between primary and high-side: 10pF
  • Switching frequency up to 100kHz
  • Delay (PWM to Vout): 200ns typ.
  • FET Gate rise/fall time:40ns typ.
  • Gate driving voltages: +20V/-5V (3% precision)
  • Low inductance gate loop design
  • Single power supply: 12V-18V
  • RS422 PWM input interface
  • Open-drain fault output
  • Under voltage lockout (UVLO)
  • On-board optional non-overlap generation (via jumper)
  • Anti-overlap protection (on PWM inputs)
  • Glitch suppressor on PWM inputs
  • Desaturation protection
  • Gate-Source short-circuit protection
CISSOID
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