Integrated Device Technology, Inc. (IDT) today introduced the industry’s first integrated power management IC (PMIC) developed for DDR5-based Dual In-Line Memory Modules (DIMM) and a broad range of other server memory applications. IDT’s DDR5 PMIC enables the next-generation of server DIMM solutions to efficiently scale to greater performance, density and reliability while reducing overall system power.
Machine learning, real-time analytics, in-memory compute and other applications drive an ever-increasing demand for higher memory bandwidth that data centers must meet without exploding the power profile.
Potentially complicating this issue is the industry’s transition to DDR5 DRAM based memory subsystems, which imposes greater demands on system power delivery and thermal performance due to tighter voltage tolerances and higher density memory populations.
IDT’s fully-integrated DDR5 PMIC uniquely addresses these challenges by allowing the placement of power rails locally on the DIMM, thereby enabling more efficient scaling of power delivery versus the on-motherboard power systems of the past.
The DDR5 PMIC can be used in RDIMMs, LRDIMMs and NVDIMMs and can be paired with IDT’s portfolio of memory interface products to create a full system solution that enables ecosystem partners to drive the DDR5 DIMM transition and deliver products with best-in-class performance and power efficiency.
This allows server OEMs and hyperscale customers to realize the benefits of an efficient, scalable memory power system that can be optimized according to memory density, distributes thermal emissions evenly and reduces the overall cost of power delivery and cooling.
“IDT’s DDR5 PMIC offers a compelling combination of high performance, flexibility and ease-of-use,” said Sean Fan, senior vice president and general manager, IDT’s Computing and Communications Group. “IDT is uniquely positioned to facilitate the industry’s rapid adoption of DDR5 DRAM because of our leadership position in memory interface products and PMICs optimized for high-performance memory applications such as NVDIMMs and enterprise and datacenter SSDs.”
Key features of the DDR5 PMIC include:
- Fully independent and programmable switching regulators and LDOs
- Advanced protection mechanisms that increase reliability and reduce overall BOM cost
- Management interface for customer customization and platform optimization
- Advanced on-demand thermal and power monitoring capability
- Integration with DDR5 memory interface components that improves power envelopes in both full bandwidth and lower power states
DDR5 PMIC samples will be available to select customers upon request.