The new STM32H7 MCUs from STMicroelectronics are the industry’s highest-performing Arm® Cortex®-M general-purpose MCUs. They combine dual-core computing speed with power-saving features and enhanced cyber protection.
The new devices leverage a 480MHz version of the Cortex-M7, the highest performing member of Arm’s Cortex-M family, and add a 240MHz Cortex-M4 core. Each core operates in its own power domain and can be turned off individually when not needed.
ST says that with the company’s smart architecture, efficient L1 cache, and adaptive real-time ART Accelerator™, the MCUs set new speed records at 1327 DMIPS and 3224 CoreMark™ executing from embedded Flash. ST’s Chrom-ART Accelerator™ gives an extra boost to graphics performance.
Through flexible use of the two cores, developers can easily upgrade existing applications. For example, they can add a sophisticated user interface to an application such as a motor drive previously hosted on a single-core Cortex-M4 MCU by migrating legacy code to the STM32H7 Cortex-M4 with the new GUI running on the Cortex-M7.
Another example is boosting application performance by offloading intensive workloads such as neural networks, checksums, DSP filtering, or audio codecs.
ST points out that the dual-core architecture also helps simplify code development and accelerate time to market in projects where user-interface code may be developed separately from real-time control or communication features.
STM32H7 MCUs come with pre-installed keys and native secure services such as Secure Firmware Install (SFI). SFI lets customers order standard products anywhere in the world and have the encrypted firmware delivered to an external programming company without exposing unencrypted code.
In addition, built-in support for Secure Boot and Secure Firmware Update (SB-SFU) protects Over the Air (OTA) feature upgrades and patches.
Compared to Flashless processors, STM32H7 MCUs provide high performance with the added advantage of up to 2MB Flash and 1MB SRAM on-chip to better handle space constraints and simplify the design of smart objects in industrial, consumer, and medical applications with real-time performance or AI-processing requirements.
Furthermore, the Cortex-M7 level 1 cache and parallel and serial memory interfaces offer fast and unlimited access to external memory.
Taking advantage of an L1 cache, STM32H7 devices can provide the maximum theoretical performance of the Cortex-M7 and Cortex-M4 cores, regardless of whether or not code is executed from embedded Flash or external memory: 3224 CoreMark /1327 DMIPS at 480MHz fCPU.
Other features include Error Code Correction (ECC) for all Flash and RAM memory to increase safety, multiple advanced 16-bit analog-to-digital converters (ADCs), external ambient-temperature range up to 125°C allowing use in severe environments, an Ethernet controller and multiple FD-CAN controllers giving communication-gateway capabilities, and ST’s latest high-resolution timer for generating precision waveforms.
ST noted that it already extended the STM32Cube ecosystem by adding STM32CubeH7 firmware modules with application source code, including graphical solutions based on TouchGFX and STemWin graphical-stack library. The company also offers new Evaluation, Discovery, and Nucleo boards.
Developers can leverage all the standard elements of the STM32Cube development environment, such as the ST-MC-SUITE motor-control toolkit, STM32Cube, AI machine-learning toolkit, STM32CubeMX, STM32CubeProgrammer, and certified partner solutions for STM32.
Features of STM32H7
- AXI and multi-AHB bus matrixes for interconnecting core, peripherals and memories
- 16 Kbytes +16KB of I-cache and D-cache
- Up to 2MB of embedded dual-bank Flash memory, with ECC and Read-While-Write capability
- A high-speed master direct memory access (MDMA) controller,
- Two dual-port DMAs with FIFO and request router capabilities for optimal peripheral management,
- One additional DMA Chrom-ART Accelerator for efficient 2D image copy and double-precision FPU are also part of the acceleration features available.
- A MIPI-DSI physical layer to drive high-resolution displays is also available on certain devices.
- Due to dual-clock support, the speed of peripherals is independent from the CPU’s speed, allowing system clock changes without any impact on peripheral operations
- Even more peripherals such as
- Four serial audio interfaces (SAI) with SPDIF output support
- Three full-duplex I²S interfaces
- SPDIF input interface supporting four inputs
- Two USB OTG with dedicated power supply and Dual-mode Quad-SPI interface,
- Two FD-CAN controllers
- High-resolution timer
- TFT-LCD controller
- JPEG codec
- Two SDIO interfaces
- Many other analog peripherals including
- Three fast 16-bit ADCs
- Two comparators
- Two operational amplifiers
- 1MB of SRAM with a scattered architecture
- 192KB of TCM RAM (including 64KB of ITCM RAM and
- 128KB of DTCM RAM for time-critical routines and data)
- 512KB, 288 Kbytes and 64KB of user SRAM
- 4KB of SRAM in backup domain to keep data in the lowest power modes
Authenticate and protect software IP while performing initial programming in production or conducting firmware upgrades in the field. The Secure Firmware Install and Secure Boot – Secure Firmware Upgrade (available in Q3’2019) lets the user perform the initial programming of the device in a secured mode, or perform a secured field upgrade of the code. These services are only possible with STM32H757 devices embedding a crypto/hash processor: STM32H755, STM32H757 and STM32H750.
The multi-power domains architecture allows the setting of different power domains to low-power mode to optimize power efficiency. In addition to the main regulator featuring voltage scaling to supply different voltage ranges for the core during Run and Stop modes, also, an embedded USB regulator supplies the embedded physical layer (PHY) and a backup regulator.
The dual-core STM32H747/H757 and STM32H745/H755 microcontrollers come with an on-chip SMPS, significantly enhancing dynamic power efficiency. The SMPS can also generate power for external components if needed.
- 145µ/MHz typical @VDD = 3.3V and 25°C in Run mode (peripherals off) and SMPS
- 2.80µA typical in Standby mode (low-power mode)
The Cortex-M7 core is backward compatible with the Cortex-M4 instruction set.
The STM32H743/STM32H742/STM32H753/STM32H750 line is pin-to-pin compatible with the STM32F7 series of very high-performance MCUs and STM32F4 series of high-performance MCUs for most standard packages.
ST has begun producing STM32H7 dual-core microcontrollers and samples are now available. A broad selection of packages is offered, including WLCSP. Budgetary pricing starts at $8.19 for orders of 10,000 pieces The STM32H7 single-core microcontrollers including the Value line are also available at economical pricing starting from $3.39 for orders of 10,000 pieces.