35W Isolated Flyback with Switched Valley Fill PFC – Reference Design

Design DER-637 from Power Integrations describes a constant voltage (CV) output 35W isolated flyback power supply with a single-stage power factor correction circuit for LED lighting applications. The power supply is designed to provide a 12V constant voltage from 0 to 2.92A output current load. It is also capable of providing 2.98A constant current output for LED lighting applications. The board is optimized to operate from an input voltage range of 140- to 320-Vac.

The LYTSwitch-6 IC combines primary, secondary and feedback circuits in a single surface mounted off-line flyback switcher IC. It incorporates the primary FET, the primary-side controller and a secondary-side synchronous rectification controller. The device also includes an innovative new technology, FluxLink™, which safely bridges the isolation barrier and eliminates the need for an optocoupler.

A switched valley-fill PFC circuit is added to meet the high PF requirement in lighting applications. The energy stored across the PFC inductor is delivered to the load via direct energy transfer reducing the power loss.

DER-637, using a LYTSwitch-6 IC, offers an accurate, fast transient response, constant voltage supply with a high power factor. The key design goals were high efficiency and high power factor throughout the input voltage range.

(click on schematic to enlarge)

PFC Circuit Operation

Without the added PFC circuit, the power factor of the flyback power supply is normally around 0.5 to 0.6 at full load condition. The input of the flyback power supply circuit usually consists of the full wave bridge rectifier (BR1) followed by a storage bulk capacitor (C4) capable of maintaining a voltage approximately equal to the peak voltage of the input sine wave until the next peak comes to recharge the capacitor.

The input charging pulse current must be high enough to sustain the load until the next peak. This means that the charging pulse current is around 5-10 times higher than the average current with a high phase angle difference from the voltage waveform; hence, the expected PF from this standard configuration is low and THD is high.

The added PFC circuit is called “Switched Valley-Fill Single Stage PFC” (SVF S2PFC). It is comprised of an inductor (T2) and diodes (D1 and D5) connected directly to the DRAIN pin of the LYTSwitch-6 IC. The LYTSwitch-6 flyback switching action is able to draw a high frequency pulse current from the full wave rectified input. This will reduce the rms input current and the phase angle difference from the input line voltage will be lower; hence, power factor will increase and will improve THD.

The PFC inductor T2 operates in DCM mode. During the LYTSwitch-6 turn ON time, current drawn from the rectified input ramps through the PFC inductor (T2) storing energy. The stored energy on T2 is then delivered to the load via direct energy transfer between the primary and secondary winding of the flyback transformer T1.

Any excess energy from the PFC inductor that is not delivered to the load is being stored to the bulk capacitor. During no-load and light load conditions (i.e, less than 250mA output load current), the secondary requires less energy from the primary; therefore, more excess energy from the PFC inductor is stored on the bulk capacitor causing the voltage to rise gradually.

The expected voltage stress across the bulk capacitor C4 will be higher than the peak input voltage. To limit the bulk voltage below the bulk capacitor rating, especially at high input voltage, a Zener-resistor clamp circuit is used (VR2, VR3, and R19). The Zener voltage is set at 480V; when the bulk voltage goes beyond this the Zener diodes conduct and bleed current from the bulk capacitor through resistor R19.

This prevents the bulk capacitor voltage to rise above 480V. The power dissipation of this Zener-resistor clamp should be considered at the worst-case creeping of the bulk voltage – happens usually at light load condition.

Diodes D1 and D5 are connected in series to withstand voltage stress caused by the resonance ringing during the FET turn off. The variability of the PFC inductor peak current will be compensated by LYTSwitch-6 primary and secondary side control maintaining the voltage regulation at all conditions.

A low cost RCD clamp circuit across the Drain-to-Source pins of the LYTSwitch-6 IC will also limit the bulk voltage from rising at light load, but the additional dissipation will cause a decrease in overall system efficiency and increase no-load input power consumption.

Summary of features:

  • Accurate constant voltage regulation
  • High power factor, >0.9 at 230V and 277V inputs
  • Fast transient load response
  • Highly energy efficient, >88 % at 230V and 277V inputs
  • Integrated protection and reliability features
    • Output short-circuit protection
    • Line and output OVP
    • Thermal foldback and over-temperature shutdown with hysteretic automatic power recovery
  • No damage during line brown-out or brown-in conditions
  • Meets IEC 2.5kV ring wave, 1kV differential surge
  • Meets EN55015 conducted EMI
Power Integrations, Inc.
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