Gab-Su Seo1,2, Ratul Das1, and Hanh-Phuc Le1 – 1Department of Electrical, Computer, and Energy Engineering, University of Colorado, 2Power Systems Engineering Center, National Renewable Energy Laboratory, Colorado, U.S.A. – Corresponding author email: firstname.lastname@example.org
The demand for information is growing at an unprecedented rate with no signs of slowing. With drastically increasing demands for cloud computing and big data processing, the electric energy consumption of data centers in the U.S. is expected to reach 73 billion kWh by 2020 , which will account for approximately 10% of the U.S total electric energy consumption. A large portion of this consumption is caused by losses from inefficient power delivery architectures that require a lot of attention for improvements , .
With the emergence of the 48V bus architecture, a new hybrid converter can be employed which achieves a peak efficiency that exceeds 95% and with 225W/in3 power density. Of great interest for data center applications, where light load efficiency is critical for energy savings, the converter efficiency is kept higher than 90% down to a 20% load.
The converter reported in this article is the first demonstration of a new hybrid dc-dc converter family supporting ultra-high efficiency for large converter ratios and large power density at core voltages that could be a game changer for power delivery in data centers, telecommunication, and other high-performance IT system applications.
Emergence of 48 V Bus Architecture and the Dual Inductor Hybrid Converter (DIHC)
As the required distribution currents keep increasing for more demanding digital loads, the conventional 12V bus architecture has exposed higher losses, complexity, and cost for interconnects and power delivery network. To address these issues, the 48V bus architecture has emerged to be a new industry standard. Google, HP and other prominent data center designers and users plan to employ this higher voltage architecture . However, the large conversion ratio from 48V to processor core voltages (about 1-1.8 V) poses significant challenges in the design of voltage regulator modules (VRM) pressing for high efficiency and high power density for installations in the vicinity of CPUs , , .
A new Dual Inductor Hybrid Converter (DIHC), originated from the Dickson switched capacitor converter  shown in Figure 1, is proposed in  to effectively address the drawbacks of the conventional approaches. The DIHC, shown in figure 2, employs two interleaved inductors at the output and eliminates two large synchronous switches, S9 and S10, in the hybrid Dickson converter presented in Figure 1. This design features fewer number of switches and more effective switch utilization than the Dickson converter, leading to substantially less conduction losses presented by a smaller equivalent output impedance. Detailed analysis on circuit operation and steady-state characteristics has been documented .
This new converter topology is verified by a 20W, 48V VRM prototype. The printed circuit board implementation with key components is shown in Figure 3. The component selections and specifications are tabulated in Table 1. The key operation waveforms of a prototype operating at 48V to 1.6V / 5A are shown in Figures 4 and 5.
In Figure 4, the two interleaved inductor currents are naturally balanced with no need for additional balancing control. Figure 5 captures the flying capacitor voltages in steady state operation. As analyzed in previous work , all capacitors are soft-charging by inductor current and split-phase operation without significant voltage jump due to hard charging that occurs in conventional switched capacitor converters.
Figures 6 displays the measured efficiency of the prototype converter with different output voltages, from 1V through 2V when operating at 48V input, and Figure 7 shows the measured efficiency with input voltage range of 40V through 54V into 1.8V output. Owing to superior output impedance by reasonable on-time and excellent switch utilization, soft-charging for all capacitors, and interleaving benefits, the converter can exceed 95% peak efficiency, and with 225W/in3 power density, considering key power conversion components. It is also beneficial that the converter efficiency is kept higher than 90% down to a 20% load in data center applications, where light load efficiency is quite important for energy saving.
Table 2 compares the state-of-the art technologies for 48V core application and highlights DIHC’s superior efficiency and relatively simple structure (few active components). Simple operations and increased duty cycle (switch on-time) promise high potential to further increase the converter power density with higher switching frequency for this architecture.
A new hybrid converter using two interleaved inductors for high efficiency and high power density is presented. By streamlining the power conversion structure and, as a result, eliminating two freewheeling switches, the converter improves output impedance in switch and capacitor conduction losses approximately two times compared with a hybrid Dickson converter counterpart.
Interleaved dual output inductors bring the benefits of multiphase interleaving architecture for high-current applications with naturally balanced inductor currents by the flying capacitors’ steady-state operation. A 20W proof-of-concept prototype verifies the converter’s desirable operations and characteristics, achieving a peak efficiency that exceeds 95% and with 225W/in3 power density.
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