Fairchild Semiconductor Develops New Bottomless Package

Fairchild Semiconductor Corp. (Sunnyvale, CA) has developed the industry's first package that combines the thermal performance of the TO-263 (D2-PAK) with the eight-pin SOIC footprint. This new package is constructed using the solder-bump technology Fairchild pioneered with its MOSFET BGA. Package resistance is nearly eliminated, allowing for the industry's lowest Rds(on) in the area of an SO-8.

The Bottomless package can handle 60 percent more current than the same die packaged in a conventional SO-8, allowing designers to increase current output without increasing PCB space or component count. The package eliminates wire-bonds allowing the PCB heat-sink to be in direct contact with the solderable backside of the MOSFET die.

This new package also reduces the junction-to-case thermal resistance below 1 degree C per watt, a dramatic improvement from the 25 degrees C per watt found in conventional SOIC packages. Thermal resistance is further improved by providing heat conduction from both the drain contact on the bottom of the package and the source leads, which are thermally coupled to the MOSFET source.